Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series0/EZR32LG/EZR32LG330F128R60/DMA/LOOP0#0x0
Channel 0 Loop Register
Loop Width
DMA Channel 0 Loop Enable
https://github.com/cmsis-svd/cmsis-svd-data